Describes revision 2.1 of the PCI bus specification and explains PCI's relationship to the rest of the system, with sections on the local bus concept; mainstream aspects of PCI bus operation; device configuration in a system with a single PCI bus; the PCI-to-PCI bridge; the PCI BIOS; support for cacheable PCI memory; 66MHz PCI implementation; and the VLSI VL82C59x supercore chipset. For hardware and software design and support professionals with prior knowledge of PC and processor bus architecture. Annotation c. by Book News, Inc., Portland, Or.Title Summary
"PCI System Architecture describes revision 2.1 of the Peripheral Component Interconnect (PCI) bus specification, providing a clear, concise explanation of PCI's relationship to the rest of the system. This book has been updated and revised to include in-depth treatment of PCI to PCI bridges, the PCI BIOS, the 66MHz PCI bus, and more. PCI experts Tom Shanley and Don Anderson provide a comprehensive treatment of the bus." "This book also examines the VLSI Technology VL82C59x chipset to illustrate an example PCI bus implementation."--BOOK JACKET. Title Summary field provided by Blackwell North America, Inc. All Rights Reserved